[oshug-announce] OSHUG 55 — FPGA projects past, planned and possible, Thursday 16th February.
andrew at abopen.com
Sat Jan 21 12:02:24 UTC 2017
Registration is now open for the February meeting, details of which can
be found below.
We also still have space for 1 or 2 more short talks of 10-15 minutes,
so if you have an idea for a talk, get in touch!
Event #55 — FPGA projects past, planned and possible
On the 16 February 2017, 18:00 - 20:00 at BCS London, 1st Floor, The
Davidson Building, 5 Southampton Street, London, WC2E 7HA.
The fifty-fifth meeting will feature a series of shorter talks that
explore past, planned and possible projects which use FPGAs.
— FPGA Projects - What would I build and why would I want to
PLAs have been interesting ever since the 70s when digital logic often
became complex, consuming unnecessary space and power. Back then the
cost of PLA deployment was high and it has continued to be high until
recently. Now that we have powerful, low cost development platforms and
relatively cheap FPGAs the cost equation has shifted radically.
* Paul Tanner is a consultant, developer and maker in wood, metal,
plastic, electronics and software. His day job is IT-based business
improvement for SMEs. By night he turns energy nut, creating tools to
optimise energy use. Paul graduated in electronics and was responsible
for hardware and software product development and customer services in
several product and service start-ups, switching to consulting in 2000.
— Using FPGAs to solve realtime problems
Microcontrollers a great platform to solve basic control problems in
electronics, with simple motor drivers and sensors readily avaiable and
easy to integrate. However, when the motor control becomes more complex
with BLDC and FOC things get much more tricky. When you have to use
multiple BLDC motors and more complex sensors with image processing the
poor microcontroller quickly becomes to swamped to provide control in
realtime. This is where adding FPGA technology makes a great deal of
sense particularly in mutli-discipline projects like robotics where many
sensors, motors and image processing will need to be managed and
controlled concurrently. A robotics platform must therefore contain both
concurrent hardware resources, algorithmic control through soft or hard
cores along with communication protocols.
* Alan Wood has been working with parallel distributed programming for
several decades. His recent work includes smart grids, 3D printers,
robotics, automation and biotec diagnostics. His current research is
focused on machine learning, inference and image processing for embedded
applications using FPGA and multi-cores. He is a long term advocate and
moderator (aka Folknology) for xCORE and other opensource communities,
as well as a founder of Surrey and Hampshire Makerspace and myStorm FPGA
— FPGAs in the Cloud?
It is no secret that FPGA based computing machines are great at dealing
with certain types of workloads that conventional CPU based machines can
not efficiently handle. These machines, alongside their GPU and even
custom ASIC based brethren, have been filling up racks in large data
centres all over the globe helping speed up systems that have components
of machine learning, complex analytics and even video processing.
This short talk will have a look at the state of FPGAs in the datacenter
and discuss the recent developments around the availability of FPGA
equipped computing nodes in commodity cloud providers.
* Omer Kilic is an Embedded Systems Engineer who enjoys working with
small connected computers of all shapes and sizes. He works at the
various intersections of hardware and software engineering practices,
product development and manufacturing.
— Chip Hack 2017 & EDSAC Challenge
This talk will introduce and issue a call for participation for two
events that are being hosted as part of the Wuthering Bytes technology
festival, that will take place in Hebden Bridge in September, in the
week following Open Source Hardware Camp 2017.
Chip Hack is a two day hands-on workshop that provides a gentle
introduction to programming FPGAs and is aimed at novices with no prior
experience of Hardware Description Languages (HDLs) or FPGAs. This will
be followed immediately by a challenge event, during which a small team
of experts will work to extend a basic functional FPGA model of EDSAC —
the pioneering computer designed and constructed at Cambridge
University, and which was operational by 1949.
* Dr Jeremy Bennett is founder and Chief Executive of Embecosm, a
consultancy implementing open source compilers and chip simulators for
major corporations around the world. He is a author of the standard
textbook "Introduction to Compiling Techniques" (McGraw-Hill 1990, 1995,
2003). Contact him at: jeremy.bennett at embecosm.com.
Note: Please aim to arrive by 18:15 as the event will start at 18:30 prompt.
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