[oshug] Fwd: 2017 NetFPGA open source design challenge
asb at asbradbury.org
Wed Feb 1 14:05:07 UTC 2017
The NetFPGA project are running an open source design challenge, that
might be of interest to some people on this list.
For more info, see http://www.cl.cam.ac.uk/research/srg/netfpga/challenge2017/
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We are pleased to announce the 2017 NetFPGA Design Challenge!
NetFPGA platforms are used by the networked systems community for
close to a decade. The platforms enable researchers and instructors to
build high-speed, hardware-accelerated networking systems. The
platforms can be used by researchers to prototype advanced services
for next-generation networked systems. By using Field Programmable
Gate Arrays (FPGAs), NetFPGA enables new types of packet routing
circuits to be implemented and detailed measurements of network
traffic to be obtained.
The NetFPGA 2017 contest is a design challenge. The design teams are
to produce a working implementation employing any HW and SW design
methodology and targeting the NetFPGA SUME platform. The deadline for
submissions is April 13th, 2017. The winners will be announced at the
NetFPGA Developers Summit (Thursday 20th - Friday, 21st April, 2017
Challenge: Lowest Latency Switch
Low latency devices are being increasingly used across a large number
of applications. Low latency solutions are few, and are rarely open
source. The goal of this challenge is to provide a usable, high
performance, open source alternative to use by universities and
need the flexibility of open source.
The systems will be evaluated using OSNT, an Open Source Network
Tester. Test benches will be available online, for users to experiment
and independently evaluate their design. The competition is open to
students of all levels (undergraduate and postgraduate), as well as to
non students. There is no need to own a NetFPGA SUME platform to take
part in the competition although, clearly, development and testing
will be made easier if you have access to this platform.
First place: £500
Best students project: £500
The winning projects and runner ups will be invited to present their
work at the NetFPGA Developers Summit 2017.
All challenge participants are keenly encouraged to attend the NetFPGA
Developers Summit and are entitled to a reduced registration rate.
The design challenge prizes are generously supported by IMC http://www.imc.nl/
More details can be found at:
The NetFPGA Team
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